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## Implementation of ScramblerDescrambler for use with SONETOTNPosted by: seminar class Created at: Tuesday 26th of April 2011 12:53:55 AM Last Edited Or Replied at :Tuesday 26th of April 2011 12:53:55 AM | vhdl scrambler x6 x6 1 ,
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SERIES FAMILY NAME DEVICE NAME PACKAGE SPEED SCRAMBLING• Used for sufficent 0-1 transitions • Scrambler is 7 bit self-synchronizing • Polynomial X7 + X6 + 1 • Scrambler is initialized with ones SONET• Bellcore 1985 • ITU-T Standard • 2 sides of SONET • 3 layers of SONET Physical layer Line layer Path layer Self healing rings(APS) Span & ring switching 2F-UPSR, 2F/4F BLSR DoS GFP VCAT LCAS OTN• Manages optical signals in optical domain • Long distance Tx • S.................. [:=> Show Contents <=:] | |||

## Binary MultiplierPosted by: ajukrishnan Created at: Wednesday 09th of December 2009 06:00:49 AM Last Edited Or Replied at :Tuesday 26th of July 2011 11:09:23 PM | binary multiplier sequential,
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er of bits of the two operands.Also implemented are combinations of dadda-booth and wallace-booth
Index Terms-Modified Booth Algorithm, Wallace tree, Dadda tree, Carry-save adder, Carry Look-Ahead adder................... [:=> Show Contents <=:] | |||

## Implementation of stepper motor control using VHDL on FPGAPosted by: electronics seminars Created at: Tuesday 01st of December 2009 07:05:35 AM Last Edited Or Replied at :Wednesday 27th of July 2011 11:06:06 PM | FPGA,
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ntrol the stepper motor using the Very high speed integrated circuit hardware description language.
The main use of this project is to control the stepper motor in antenna systems, floppy drives etc
for high accuracy and efficiency..................[:=> Show Contents <=:] | |||

## DUAL PORT FIFOPosted by: computer science crazy Created at: Thursday 17th of September 2009 11:26:23 AM Last Edited Or Replied at :Saturday 08th of September 2012 06:34:39 PM | DUAL PORT FIFO,
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he dual port FIFO is now a standard building block in most designs, especially in the area of
communications where it is used frequently for packet work. Although very useful in its basic form,
the standar..................[:=> Show Contents <=:] | |||

## IMPLEMENTATION OF ADVANCED ENCRYPTION STANDARD AESPosted by: computer science crazy Created at: Wednesday 16th of September 2009 03:33:00 PM Last Edited Or Replied at :Wednesday 14th of March 2012 04:20:53 AM | STANDARD ,
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n Standard (AES), a Federal Information Processing Standard (FIPS-197), is an approved cryptographic
algorithm that can be used to protect electronic data. The AES algorithm is a block cipher that can
encrypt and decrypt digital information. The AES algorithm is capable of using cryptographic keys of
128, 192, and 256 bits, and this project implements the 128 bit standard using the VHDL, a hardware
description language. The National Security Agency (NSA) announced that AES-128 may be used for
classified information at the SECRET level and AES-192/256 for TOP SECRET level documents. The algo.................. [:=> Show Contents <=:] | |||

## Multiplier Accumulator Component VHDL ImplementationPosted by: seminar projects crazy Created at: Friday 14th of August 2009 05:36:54 AM Last Edited Or Replied at :Thursday 23rd of February 2012 05:25:46 AM | Implementation,
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hitecture makes it an ideal candidate for use in system-on-chip environments that strive to
integrate heterogeneous programmable architectures..................[:=> Show Contents <=:] | |||

## Design of Manchester Encoder-decoder in VHDLPosted by: seminar projects crazy Created at: Friday 14th of August 2009 05:30:15 AM Last Edited Or Replied at :Sunday 13th of November 2011 10:07:10 PM | VHDL,
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cronym which stands for VHSIC Hardware Description Language. VHSIC is yet another acronym which
stands for Very High Speed Integrated Circuits VHDL can wear many hats. It is being used for documentation, verification, and synthesis of large digital designs. This is actually one of the key features of VHDL, since the same VHDL code can theoretically achieve all three of these goals, thus saving a lot of effort. In addition to being used for each of these purposes, VHDL can be used to take three different approaches to describing hardware. These three different approaches are the structural,.................. [:=> Show Contents <=:] | |||

## VHDL VHSIC Hardware Description LanguagePosted by: Computer Science Clay Created at: Thursday 30th of July 2009 05:46:09 AM Last Edited Or Replied at :Thursday 30th of July 2009 05:46:09 AM | Language ,
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onses, and could act as a medium of information exchange between the chip foundries and the CAD tool
operators. However, due to military restrictions, it remained classified till 1985. There was a large participation of the private sector electronics industry in the development of the language. It felt that there was a need to make the language industry standard. In 1985, the DOD granted a permission to hand over the specs to IEEE. Subsequently IEEE released the IEEE 1076/A standard in 1987. It was later revised in 1993. The 1993 revisions are minor and many of the simulation and .................. [:=> Show Contents <=:] |

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