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Title: Numerical modeling of tunneling
Page Link: Numerical modeling of tunneling -
Posted By: project report maker
Created at: Sunday 01st of August 2010 10:10:49 AM
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ABSTRACT:
The finite element program CRItical State Program (CRISP) has been used to model the New Austrian Tunneling Method (NATM) in London Clay. The non-linear behavior of the London Clay was modeled by a Strain Dependent Modified Cam Clay (SDMCC) model and the tunnel lining was modeled by constant and time-dependent classic models. The construction process was modeled in two and three dimensions by removing soil elements in sequence. The tunnel lining was either assumed wished-in-place or introduced after the excavation of each pan ....etc

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Title: advanced propulson methods presentation pdf
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Posted By: Guest
Created at: Tuesday 02nd of October 2012 04:10:31 PM
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Title: 3d display methods in computer graphics pdf
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Title: Scanning Probe Microscopythe Scanning Tunneling Microscope
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Posted By: seminar class
Created at: Monday 21st of March 2011 11:36:38 PM
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The best optical microscopes can see structures in the 200 – 400 nm range, at their limits of resolution.
The STM can “see” structures on the order of 0.1 nm —another SPM, the AFM—can distinguish things on the order of 100 nm .
Optical microscopes are “diffraction limited”—the wavelength range of visible light (400-750 nm) sets the size of the smallest thing that can be imaged: ~ 400 nm.
Scanning Probe Microscopes don’t use visible light—they depend on measuring intermolecular ....etc

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Title: methods and instruments for condition monitoring pdf
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Posted By: Guest
Created at: Wednesday 09th of January 2013 12:23:36 AM
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Title: conventional tunneling full report
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Posted By: seminar presentation
Created at: Tuesday 18th of May 2010 09:33:41 AM
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SEMINAR ON-
CONVENTIONAL TUNNELLING
PRESENTED BY-
Namrata M. Lolge (09CM16F)
M. Tech. 1st sem
NITK
TUNNELLING TECHNIQUES



DEFINITION

A definition of Conventional Tunnelling can be the construction of underground openings of any shape with a cyclic construction process of-
1. excavation, by using the drill and blast methods or mechanical excavators (except any full face TBM)
2. mucking
3. placement of the primary support elements such as-
-steel ribs or lattice gir ....etc

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Title: Simulation and Design of NanocircuitsWith Resonant Tunneling Devices
Page Link: Simulation and Design of NanocircuitsWith Resonant Tunneling Devices -
Posted By: seminar class
Created at: Wednesday 04th of May 2011 05:11:40 AM
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Abstract
New nanotechnology-based devices are being researchedto replace CMOS devices in order to overcome CMOStechnology’s scaling limitations. However, many such devicesexhibit nonmonotonic I–V characteristics and uncertain propertieswhich lead to the negative differential resistance (NDR)problem and the chaotic performance. This paper proposes twonew circuit simulation approaches that can effectively simulatenanotechnology devices with uncertain input sources and negativedifferential resistance problem. A new tool called NanoSim- ....etc

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Title: Compact Current and Current Noise Models for Single-Electron Tunneling Transistors
Page Link: Compact Current and Current Noise Models for Single-Electron Tunneling Transistors -
Posted By: smart paper boy
Created at: Thursday 28th of July 2011 05:19:06 AM
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Abstract
This paper presents an analytic current model for capacitively coupled Single-Electron Tunneling Transistors (SETTs) that is based on a modified M-state steady-state master equation. Based on this current model we also derive a current noise model for SETT. To validate the proposed models we calculate their characteristics at different device parameters and different operation temperatures and compare them with the corresponding characteristics calculated by the full master equation method. The results indicate that the propos ....etc

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Title: Single electron tunneling SET transistor
Page Link: Single electron tunneling SET transistor -
Posted By: computer science topics
Created at: Monday 28th of June 2010 01:02:56 PM
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Single electron tunneling (SET) transistor

ABSTRACT
The chief problem that are faced by chip designers are regarding the size of the chip. According to Moores„¢s Law, the number of transistors on a chip will approximately double every 18 to 24 months. Moore\'s Law works largely through shrinking transistors-the circuits that carry electrical signals. By shrinking transistors, designers can squeeze more transistors into a chip. However, more transistors means more electricity and heat compressed into an even smaller space. F ....etc

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Title: new methods to power mobile phones pdf
Page Link: new methods to power mobile phones pdf -
Posted By: Guest
Created at: Monday 31st of December 2012 01:58:02 AM
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