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circuit diagram and details of mini time bomb

Posted by:
Created at: Friday 01st of February 2013 02:04:00 AM
Last Edited Or Replied at :Friday 01st of February 2013 02:04:00 AM
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i need to know the ..................[:=> Show Contents <=:]


Posted by: Computer Science Clay
Created at: Saturday 06th of June 2009 02:41:14 PM
Last Edited Or Replied at :Friday 01st of April 2011 12:24:40 AM
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that are not in use to be disabled. With the increasing popularity of cable and ADSL Internet connections and the ever-increasing availability of peripherals that use the USB interface, it will often be possible to get by without needing either a serial or a parallel port. CMOS RAM Motherboards also include a separate block of memory made from very low power consumption CMOS (complementary metal oxide silicon) RAM chips, which is kept 'alive' by a battery even when the PC's power is off. This is used to store basic information about the PC's configuration: number and type of hard and floppy dr..................[:=> Show Contents <=:]

FPAA for Analog Circuit Design

Posted by: computer science crazy
Created at: Friday 17th of April 2009 08:03:17 AM
Last Edited Or Replied at :Friday 17th of April 2009 08:03:17 AM
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s. This synthesis flow, consists of four major phases:
Function decomposition
Macro-cell synthesis
Placement and Routing
Post-placement simulation

l. Function decomposition

The high level description of analog functions can be cataloged into two groups as:
logic description
transfer functions
ll. Macro-cell synthesis
The sub-routine of macro-block generation maps the decomposed transfer functions into SC ckts, fit in the structure of (CAB) in the targeted FPAA chip making design space large .

lll. Placement and Routing

Maps the synthesized analog circuit into the ..................[:=> Show Contents <=:]

mini Project Ideas Seminar Topics for CS IT Engineering

Posted by: computer science crazy
Created at: Thursday 16th of April 2009 05:54:13 PM
Last Edited Or Replied at :Monday 12th of March 2012 11:29:06 PM
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will monitor application on a LAN and provide functions
19. Voice Mail Systems
20. Computer Telephony Integration

Seminar Topics:

1. GSM
2. Viruses
3. Bluetooth Technology
5. Artificial Intelligence
6. Spyware
7. Quantum Computing
8. Blue - Ray Disc
9. Robotics
10. RFID
12. WAP
13. DNA Computing in security
14. 4g Wireless Systems
15. HomeRF- localized wireless technology optimized for the home environment
16. Internet Searching
17. Zigbee
18. Java Management Extensions (JMX) - component framework for building intelligent network
19. Earth Simulato..................[:=> Show Contents <=:]

Laser Communication Systems

Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 01:07:55 PM
Last Edited Or Replied at :Tuesday 07th of April 2009 01:07:55 PM
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velopment of large space and ground-base receiving stations and payload designs for optical data transfer from interplanetary spacecraft. Space laser communication is beginning to be accepted as a viable and reliable means of transferring data between satellites. Presently, ongoing hardware development efforts include ESA's Space satellite Link Experiment (SILEX) and the Japanese's Laser Communication Experiment (LCE). The United States development programs ended with the termination of both the production of the laser cross-link subsystem and the FEWS satellite program
Satellite use from ..................[:=> Show Contents <=:]

Universal Asynchronous Receiver Transmitter

Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 12:59:19 PM
Last Edited Or Replied at :Tuesday 07th of April 2009 12:59:19 PM
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likely that this specific design is useful by itself.

The basic functions of a UART are a microprocessor interface, double buffering of transmitter data, frame generation, parity generation, parallel to serial conversion, double buffering of receiver data, parity checking, serial to parallel conversion. The data is transmitted asynchronously one bit at a time and there is no clock line.
The frame format of used by UARTs is a low start bit, 5-8 data bits, optional parity bit, and 1 or 2 stop bits. Universal Asynchronous Receive/Transmit consists of baud rate generator, transmitter and rece..................[:=> Show Contents <=:]

Tri-Gate Transistor

Posted by: computer science crazy
Created at: Sunday 21st of September 2008 01:14:22 PM
Last Edited Or Replied at :Wednesday 22nd of February 2012 11:59:00 PM
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chnology. Silicon integrated circuit (IC) products that, at present, require modern bipolar or BiCMOS silicon technology in wired application space include the essential optical network (SONET) and synchronous digital hierarchy (SDH) operating at 10 Gb/s and higher. The viability of a mixed digital/analog. RF chip depends on the cost of making the silicon with the required elements; in practice, it must approximate the cost of the CMOS wafer, Cycle times for processing the wafer should not significantly exceed cycle times for a digital CMOS wafer. Yields of the SOC chip must be similar to thos..................[:=> Show Contents <=:]

F1 Track Design and Safety

Posted by: computer science crazy
Created at: Saturday 20th of September 2008 10:52:19 PM
Last Edited Or Replied at :Friday 07th of September 2012 02:07:53 PM
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logy, experimenting with new materials for optimum performance.

Circuit and Safety Analysis System (CSAS)

Predicting the trajectory and velocity of a racing car when it is driven at the limit within the confines of a racing track, is now the subject of a great deal of analytical work by almost all teams involved in racing at all levels. However, predicting the trajectory and velocity of a car once the driver has lost control of it has not been something the teams have devoted a great deal of time to. This can now also be analyzed though in the same sort of detail, to assess the safety f..................[:=> Show Contents <=:]

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