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MULTIMEDIA ANIMATION


Posted by: seminar surveyer
Created at: Saturday 09th of October 2010 03:11:36 AM
Last Edited Or Replied at :Saturday 09th of October 2010 03:11:36 AM
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Video Image Compression Techniques


Posted by: vissu_52
Created at: Monday 21st of December 2009 03:01:11 AM
Last Edited Or Replied at :Friday 24th of February 2012 11:35:37 PM
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I want the report on Video Image Compression Techniq..................[:=> Show Contents <=:]



low-power multiplier with the spurious power suppression technique


Posted by: Electrical Fan
Created at: Wednesday 09th of December 2009 03:14:07 AM
Last Edited Or Replied at :Wednesday 09th of December 2009 03:14:07 AM
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time which not only facilitates the robustness of SPST but also leads to a 40% speed improvement. Adopting a 0.18-µm CMOS technology, the proposed SPST-equipped multiplier dissipates only 0.0121 mW per MHz in H.264 texture coding applications, and obtains a 40% power reduction...................[:=> Show Contents <=:]



3D Face Recognition


Posted by: electronics seminars
Created at: Monday 30th of November 2009 03:38:04 AM
Last Edited Or Replied at :Monday 03rd of January 2011 11:16:25 PM
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dress the non-rigid facial movement, such as expressions, we present a facial surface modeling and matching scheme to match 2.5D test scans in the presence of both non-rigid deformations and large pose changes (multiview) to a neutral expression 3D face model. A geodesic-based resampling approach is applied to extract landmarks for modeling facial surface deformations. We are able to synthesize the deformation learned from a small group of subjects (control group) onto a 3D neutral model (not in the control group), resulting in a deformed template. A personspecific (3D) deformable model is bui..................[:=> Show Contents <=:]



Particle Swarm Optimization Algorithm and Its Application in Engineering Design Optim


Posted by: computer science crazy
Created at: Friday 23rd of October 2009 06:14:34 AM
Last Edited Or Replied at :Thursday 02nd of May 2013 11:58:46 PM
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as an alternative method to solve global optimization problems is simpler and easy to handle. The modified particle swarm optimization (PSO) algorithm is app..................[:=> Show Contents <=:]



Seminar Report On Line-Reflect-Reflect Technique


Posted by: mechanical wiki
Created at: Sunday 06th of September 2009 08:23:46 PM
Last Edited Or Replied at :Sunday 12th of February 2012 11:53:57 PM
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etwork analyzers (VNA). VNA measure the complex transmission and reflection characteristics of microwave devices. The analyzers have to be calibrated in order to eliminate systematic errors from the measurement results.

The LRR calibration circuits consist of partly unknown standards, where L symbolizes a line element and R represents a symmetrical reflection standard. The calibration circuits are all of equal mechanical length. The obstacle, a symmetrical-reciprocal network is placed at three consecutive positions. The network consists of reflections, which might show a transmission. The c..................[:=> Show Contents <=:]



Dynamic Cache Management Technique


Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 09:15:03 PM
Last Edited Or Replied at :Thursday 31st of March 2011 01:26:21 AM
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e memories are accounting for an increasing fraction of a chip's transistors and overall energy dissipation. Current proposals for resizable caches fundamentally vary in two design aspects: (1) cache organization, where one organization, referred to as selective-ways, varies the cache's set-associativity, while the other, referred to as selective-sets, varies the number of cache sets, and (2) resizing strategy, where one proposal statically sets the cache size prior to an application's execution, while the other allows for dynamic resizing both across and within applications.
Five techniques ..................[:=> Show Contents <=:]



Dynamic Cache Management Technique


Posted by: computer science crazy
Created at: Sunday 21st of September 2008 11:43:59 PM
Last Edited Or Replied at :Thursday 03rd of March 2011 11:57:18 AM
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I-cache and the CPU core. This mechanism can provide the instruction stream to the data path, and when managed properly, it can efficiently eliminate the need for high utilization of the more expensive I-cache.
Cache memories are accounting for an increasing fraction of a chip's transistors and overall energy dissipation. Current proposals for resizable caches fundamentally vary in two design aspects: (1) cache organization, where one organization, referred to as selective-ways, varies the cache's set-associativity, while the other, referred to as selective-sets, varies the number of cache se..................[:=> Show Contents <=:]



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