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Study the working of basic gates like AND gate OR gate and NOT gate

Posted by: seminar class
Created at: Friday 13th of May 2011 05:20:46 AM
Last Edited Or Replied at :Friday 13th of May 2011 05:20:46 AM
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Y = A.B
This equation shows that inputs A & B are related to each other with AND mathematical operator. Thus, when A AND B both are high, then only Y is high, otherwise LOW. In this way, the AND multiplication rules for all possible inputs combinations are as follows –
a) When A = B = 0, then Y = A.B = 0.0 = 0
b) When A = 0, B = 1, then Y = A.B = 0.1 = 0
c) When A = 1, B = 0, then Y = A.B = 1.0 = 0
d) When A = B = 1, then only Y = A.B = 1.1 = 1
2) Definition of OR gate – an OR gate is a logic circuit whose output becomes high WHEN ANY ONE OF ITS INPUTS IS HIGH. Its logic equatio..................[:=> Show Contents <=:]

GSM MODEM PIC16F877Acontroller

Posted by: seminar class
Created at: Friday 22nd of April 2011 11:11:28 PM
Last Edited Or Replied at :Friday 22nd of April 2011 11:11:28 PM
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ntrollers made by Microchip Technology , derived from the PIC1640 originally developed by s Microelectronics Division. The name PIC initially referred to Peripheral Interface Controller.
PICs are popular with both industrial developers and hobbyists alike due to their low cost, wide availability, large user base, extensive collection of application notes, availability of low cost or free development tools, and serial programming (and re-programming with flash memory) capability.
Microchip announced on February 2008 the shipment of its six billionth PIC processor.
2.1 Advantages[..................[:=> Show Contents <=:]


Posted by: seminar class
Created at: Friday 25th of March 2011 05:59:08 AM
Last Edited Or Replied at :Friday 25th of March 2011 05:59:08 AM
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high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. The CLOCK INHIBIT signal can be used as a negative-edge clock if the clock line is held high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (Cout) signal completes one cycle every ten CLOCK INPUT cycles and is
used to clock the succeeding decade directly in a multi-decade co..................[:=> Show Contents <=:]


Posted by: project report helper
Created at: Monday 04th of October 2010 06:49:11 AM
Last Edited Or Replied at :Monday 04th of October 2010 06:49:11 AM
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PIN DI..................[:=> Show Contents <=:]

fingure print attendence system circuit diagram

Posted by: ramandeep
Created at: Thursday 12th of August 2010 10:07:34 PM
Last Edited Or Replied at :Friday 17th of September 2010 03:41:55 AM
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plzzzzzzzzzzzzzzzz tel..................[:=> Show Contents <=:]

Defense surveillance robot full report

Posted by: seminar topics
Created at: Sunday 21st of March 2010 12:14:45 AM
Last Edited Or Replied at :Sunday 21st of March 2010 12:14:45 AM
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control the DC motor .The port 2 of microcontroller is used to control the direction(CLK/ANTCLK) and ON/OFF condition of two DC motor. Port 0 is used to receive signal from 555 monostable circuit which is triggered by TSOP 1738.a brief description of all the blocks explained below.
2.1.1 Microcontroller AT 89S52
The micro controller used here is 89S52 is a low power, high performance CMOS 8-bit micro controller with 8K bytes of programmable flash memory. The 89S52 is the family of Intel 8051. It is powerful micro controller which provides high flexibility and cost efficient solutions to man..................[:=> Show Contents <=:]


Posted by: project report tiger
Created at: Wednesday 03rd of March 2010 11:49:28 PM
Last Edited Or Replied at :Wednesday 03rd of March 2010 11:49:28 PM
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INCFSZ f, d Increment f, Skip if 0 1(2) 00 1111 df ff f f f f 1,2,3
IORWF f, d Inclusive OR W with f 1 00 0100 df f f f f f f z 1,2
.MOVF f, d Move f 1 00 1000 dfff f f f f z 1,2
MOVWF f Move W to f 1 00 ¦ 0000 Iff f ff f f
NOP No Operation 1 00 0000 OxxO 0000
RLF f, d Rotate Left f through Carry 1 00 1101 dfff f f f f C 1,2
RRF f. d Rotate Right f through Carry 1 00 1100 dfff ff f f C 1,2
SUBWF f, d Subtract W from f 1 00 0010 dfff ff ff CDC.Z 1,2
SWAPF f, d Swap nibbles in f 1 00 1110 dfff ff ff 1,2
XORWF f, d Exclusive OR W with f 1 00 0110 dfff f f ff z 1,2
BIT-O..................[:=> Show Contents <=:]

Universal Asynchronous Receiver Transmitter

Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 12:59:19 PM
Last Edited Or Replied at :Tuesday 07th of April 2009 12:59:19 PM
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n links as RS232. UARTs are available as inexpensive standard products from many semiconductor suppliers, making it unlikely that this specific design is useful by itself.

The basic functions of a UART are a microprocessor interface, double buffering of transmitter data, frame generation, parity generation, parallel to serial conversion, double buffering of receiver data, parity checking, serial to parallel conversion. The data is transmitted asynchronously one bit at a time and there is no clock line.
The frame format of used by UARTs is a low start bit, 5-8 data bits, optional parity bi..................[:=> Show Contents <=:]

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