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The Half Adder Full Adder


Posted by: seminar class
Created at: Sunday 17th of April 2011 11:56:06 PM
Last Edited Or Replied at :Sunday 17th of April 2011 11:56:06 PM
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By
Haseena Hassan


The Half Adder & Full Adder
The Half Adder

Adds two binary digits
Produces a sum bit(S) and a carry bit(C)
Carry C is ..................[:=> Show Contents <=:]



free vhdl code error tolerant adder


Posted by:
Created at: Tuesday 30th of October 2012 12:31:46 AM
Last Edited Or Replied at :Thursday 28th of February 2013 10:56:39 AM
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dear sir,
i am looking for vhdl code of error tolerant adde..................[:=> Show Contents <=:]



a low power and area efficient carry select adder ppt


Posted by:
Created at: Sunday 29th of April 2012 05:00:25 AM
Last Edited Or Replied at :Monday 15th of October 2012 09:25:00 AM
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hi i want l..................[:=> Show Contents <=:]



Study the working of full adder for three binary digits addition


Posted by: seminar class
Created at: Friday 13th of May 2011 06:24:01 AM
Last Edited Or Replied at :Friday 13th of May 2011 06:29:17 AM
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/b] IC 7408, IC 7486, IC 7432, circuit board, LEDs, power supply +5V DC, connecting wires, soldering iron, cutter etc.
Circuit diagram



Procedure –
1) Solder the circuit of full adder, on the given board.
2) Connect respective pins of each gate to the corresponding pins of other gate.
3) Connect the outputs ‘sum’ and ‘carry’ to two LEDs.
4) Apply different combinations of inputs as per truth table and note down the corresponding change in the outputs of the circuit.
5) Tabulate the readings.
Brief th..................[:=> Show Contents <=:]



The Half Adder Full Adder


Posted by: seminar class
Created at: Sunday 17th of April 2011 11:56:06 PM
Last Edited Or Replied at :Sunday 17th of April 2011 11:56:06 PM
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The Full Adder
Adds two bits and a carry input
Outputs a sum bit and a carry
Adds the bit A&B and carry frm previous column(carry in)
Logic Diagram of full adder
..................[:=> Show Contents <=:]



Design and Optimization of Reversible BCD AdderSubtractor Circuit for Quantum and Na


Posted by: seminar class
Created at: Tuesday 15th of February 2011 10:53:06 PM
Last Edited Or Replied at :Tuesday 15th of February 2011 10:53:06 PM
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nreversible BCD adder design and optimization.From the point of view of reversible logiccircuits, there are some factors as the complexitymeasures of a circuit, namely, the number of the gates,the number of garbage inputs/outputs and the quantumcost. In this paper, a reversible Binary Coded Decimal(BCD) adder/subtractor has been designed andoptimized by using GA and DC concept in the sense ofabove factors.The structure of this paper is as follows: First weexplain the background including BCD adders,reversible logic circuits, genetic algorithms andtheir application in the synthesi..................[:=> Show Contents <=:]



Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System


Posted by: project report helper
Created at: Friday 15th of October 2010 04:29:40 AM
Last Edited Or Replied at :Friday 15th of October 2010 04:29:40 AM
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mneni
MNNIT, Allahabad Reg No.:2009VL18

..................[:=> Show Contents <=:]



Prenormalization Rounding in IEEE Floating-Point Operations Using a Flagged Prefix Ad


Posted by: seminar topics
Created at: Sunday 14th of March 2010 12:29:36 PM
Last Edited Or Replied at :Sunday 14th of March 2010 12:29:36 PM
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case a generic rounding architecture based on a prefix adder with a small amount of additional logic is sufficient to cover all the rounding modes. Critical path analysis shows that the proposed architecture is compatible with contemporary pipelined..................[:=> Show Contents <=:]



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