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digital clock seven segmen using at89s51 rtc ds1307


Posted by:
Created at: Friday 03rd of May 2013 10:58:47 AM
Last Edited Or Replied at :Friday 03rd of May 2013 11:42:41 PM
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I want to get complete digital cl..................[:=> Show Contents <=:]



rtc ds1307 at89c2051 seven segment digital clock circuit diagram


Posted by:
Created at: Wednesday 17th of October 2012 07:36:18 AM
Last Edited Or Replied at :Sunday 14th of April 2013 04:08:54 AM
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project ..................[:=> Show Contents <=:]



old Digital clock design


Posted by: projectsofme
Created at: Tuesday 28th of September 2010 10:54:38 PM
Last Edited Or Replied at :Tuesday 28th of September 2010 10:54:38 PM
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l different physical processes have been used over the millennia, culminating in the clocks of today.
This clock was made by videoing someone actually painting the time! He's inside your phone with a bucket of paint and manually changes the digits on an old-school digital clock.

The Analog Digital app is the next installment in Dutch designer Maarten Baas' Real Time series. His works cross the fields of art, design, theatre and performance. The anonymous digital clock becomes a performance as each minute is being hand painted by a hidden man in the clock.

Real Time caused a sensa..................[:=> Show Contents <=:]



Universal Asynchronous Receiver Transmitter


Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 12:59:19 PM
Last Edited Or Replied at :Tuesday 07th of April 2009 12:59:19 PM
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unlikely that this specific design is useful by itself.

The basic functions of a UART are a microprocessor interface, double buffering of transmitter data, frame generation, parity generation, parallel to serial conversion, double buffering of receiver data, parity checking, serial to parallel conversion. The data is transmitted asynchronously one bit at a time and there is no clock line.
The frame format of used by UARTs is a low start bit, 5-8 data bits, optional parity bit, and 1 or 2 stop bits. Universal Asynchronous Receive/Transmit consists of baud rate generator, transmitter and r..................[:=> Show Contents <=:]



VHDL


Posted by: computer science crazy
Created at: Sunday 21st of September 2008 11:31:34 PM
Last Edited Or Replied at :Sunday 21st of September 2008 11:31:34 PM
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e block, or it may be decomposed in several blocks. Each block in VHDL is analogous to an off-the-shelf part and is called an entity. The entity describes the interface to that block and a separate part associated with the entity describes how that block operates. The interface description is like a pin description in a data book, specifying the inputs and outputs to the block. The description of the operation of the part is like a schematic for the block.

2.Connecting Blocks
Once we have defined the basic building blocks of our design using entities and their associated architectures, we ..................[:=> Show Contents <=:]



Tri-Gate Transistor


Posted by: computer science crazy
Created at: Sunday 21st of September 2008 01:14:22 PM
Last Edited Or Replied at :Wednesday 22nd of February 2012 11:59:00 PM
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iCMOS silicon technology in wired application space include the essential optical network (SONET) and synchronous digital hierarchy (SDH) operating at 10 Gb/s and higher. The viability of a mixed digital/analog. RF chip depends on the cost of making the silicon with the required elements; in practice, it must approximate the cost of the CMOS wafer, Cycle times for processing the wafer should not significantly exceed cycle times for a digital CMOS wafer. Yields of the SOC chip must be similar to those of a multi-chip implementation. Much of this article will examine process techniques that achi..................[:=> Show Contents <=:]



wide band code division multiple access


Posted by: lini555
Created at: Monday 22nd of March 2010 12:00:34 AM
Last Edited Or Replied at :Wednesday 01st of June 2011 12:23:58 AM
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i want exact..................[:=> Show Contents <=:]



F1 Track Design and Safety


Posted by: computer science crazy
Created at: Saturday 20th of September 2008 10:52:19 PM
Last Edited Or Replied at :Friday 07th of September 2012 02:07:53 PM
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ves, car weight changes, aerodynamic characteristics etc -to predict how cars may leave the circuit at particular places. The variables are complex. The impact point of a car continuing in a straight line at a corner is easy to predict, but if the driver has any remaining control and alters the car's trajectory, or if a mechanical fault introduces fresh variables, its final destination is tricky to model.

Modern tyre barriers are built of road tyres with plastic tubes sandwiched between them. The side facing the track is covered with conveyor belting to prevent wheels becoming snagged and d..................[:=> Show Contents <=:]



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