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digital clock seven segmen using at89s51 rtc ds1307


Posted by:
Created at: Friday 03rd of May 2013 10:58:47 AM
Last Edited Or Replied at :Friday 03rd of May 2013 11:42:41 PM
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I want to get comp..................[:=> Show Contents <=:]



rtc ds1307 at89c2051 seven segment digital clock circuit diagram


Posted by:
Created at: Wednesday 17th of October 2012 07:36:18 AM
Last Edited Or Replied at :Sunday 14th of April 2013 04:08:54 AM
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p..................[:=> Show Contents <=:]



old Digital clock design


Posted by: projectsofme
Created at: Tuesday 28th of September 2010 10:54:38 PM
Last Edited Or Replied at :Tuesday 28th of September 2010 10:54:38 PM
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the Analog Digital app is now available in the palm of your hand! Some people even buy an iPod and mount it on the wall just to have this clock
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Universal Asynchronous Receiver Transmitter


Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 12:59:19 PM
Last Edited Or Replied at :Tuesday 07th of April 2009 12:59:19 PM
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ersal Asynchronous Receive/Transmit consists of baud rate generator, transmitter and receiver. The number of bits transmitted per second is called baud rate and the baud rate generator generates the transmitter and receiver clocks separately. UART synchronizes the incoming bit stream with the local clock.

Transmitter interfaces to the data bus with the transmitter data register empty (TDRE) and write signals. When transmitting, UART takes eight bits of parallel data and converts it into serial bit stream and transmit them serially.
Receiver interfaces to the data bus with the receiver read..................[:=> Show Contents <=:]



VHDL


Posted by: computer science crazy
Created at: Sunday 21st of September 2008 11:31:34 PM
Last Edited Or Replied at :Sunday 21st of September 2008 11:31:34 PM
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be decomposed in several blocks. Each block in VHDL is analogous to an off-the-shelf part and is called an entity. The entity describes the interface to that block and a separate part associated with the entity describes how that block operates. The interface description is like a pin description in a data book, specifying the inputs and outputs to the block. The description of the operation of the part is like a schematic for the block.

2.Connecting Blocks
Once we have defined the basic building blocks of our design using entities and their associated architectures, we can combine them t..................[:=> Show Contents <=:]



Tri-Gate Transistor


Posted by: computer science crazy
Created at: Sunday 21st of September 2008 01:14:22 PM
Last Edited Or Replied at :Wednesday 22nd of February 2012 11:59:00 PM
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iable. While some analog and RF designs have been attempted in mainstream digital-only complimentary metal-oxide semiconductor (CMOS) technologies, almost all designs that require stringent RF performance use bipolar or semiconductor technology. Silicon integrated circuit (IC) products that, at present, require modern bipolar or BiCMOS silicon technology in wired application space include the essential optical network (SONET) and synchronous digital hierarchy (SDH) operating at 10 Gb/s and higher. The viability of a mixed digital/analog. RF chip depends on the cost of making the silicon with t..................[:=> Show Contents <=:]



wide band code division multiple access


Posted by: lini555
Created at: Monday 22nd of March 2010 12:00:34 AM
Last Edited Or Replied at :Wednesday 01st of June 2011 12:23:58 AM
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i want exactly on wide band code division mult..................[:=> Show Contents <=:]



F1 Track Design and Safety


Posted by: computer science crazy
Created at: Saturday 20th of September 2008 10:52:19 PM
Last Edited Or Replied at :Friday 07th of September 2012 02:07:53 PM
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ill require a driver model to complete the picture. However, they are only interested in the performance of the car while the tires are in contact with the tarmac, and the driver is operating them at or below their peaks...................[:=> Show Contents <=:]



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