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CARBON NANOTUBES FOR VLSI INTERCONNECT AND TRANSISTOR APPLICATIONS


Posted by: seminar addict
Created at: Tuesday 31st of January 2012 05:18:11 AM
Last Edited Or Replied at :Tuesday 31st of January 2012 05:18:11 AM
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whose tip can apply accurately measured forces to atoms and molecules, have recently devised a means of changing a nanotube's position, shape and orientation, as well as cutting it


BASIC STRUCTURE OF NANOTUBES


Nanotubes are members
of the fullerene structural
family, which also includes
the spherical bucky balls.

Their name is derived from
their size, since the diameter
of a Nanotube is of the order
of a few nanometers, while
they can be up to 18 cm in
length.


Advantages

.SINGLE WALLED NANOTUBES

Less defective
Experimental studies ar..................[:=> Show Contents <=:]



A New VLSI Architecture of Parallel MultiplierAccumulator Based on Radix-2 Modified


Posted by: smart paper boy
Created at: Saturday 30th of July 2011 02:30:06 AM
Last Edited Or Replied at :Saturday 30th of July 2011 02:30:06 AM
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originates from the small delays in single gates, and from the wiring between them. The delay of a wire depends on how long it is. Therefore, it is difficult to model the wiring delay; it requires knowledge about the circuit’s layout on the chip. The gate delay, however, can easily be modeled by saying that the output is delayed a constant amount of time from the latest input. What we can say about the wiring delay is that larger circuits have longer wires, and hence more wiring delay. It follows that a circuit with a regular layout usually has shorter wires and hence less wiring delay than ..................[:=> Show Contents <=:]



mechanical engineering research topics and papers


Posted by: project topics
Created at: Monday 09th of May 2011 12:18:04 AM
Last Edited Or Replied at :Monday 19th of November 2012 03:36:02 AM
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mical Discharge Dressing of Metal-Bonded Diamond Grinding Wheels
49. Photovoltaics and Solar Energy: Renewable-energy Powered Desalination Systems
50. Mechanical Behaviour of Rubber Toughened Polymers over a Wide Range Of Strain Rate and Temperature
51. Spray Modelling
52. The Effects of Rayleigh Waves on Improving the Surface Finish of Castings
53. Integrated Information Systems to Support Quality Management
54. The Influence of the Osteoporosis in The Mechanical Behavior of Hip Replacements
55. Fast Track Design and Reliability of Total Care Systems
56. Design of a 5-axis micromachi..................[:=> Show Contents <=:]



VLSI Physical Design Automation ppt


Posted by: seminar surveyer
Created at: Thursday 27th of January 2011 03:22:48 AM
Last Edited Or Replied at :Thursday 27th of January 2011 03:22:48 AM
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t to other subcircuits does not exceed the terminal count of the subcircuit. In case of system level partitioning, this limit is decided by the maximum number of terminals available on a PCB connector which connects the PCB to the system bus. In case of board level partitioning, this limit is decided by the pin count of the package used for the chips. In case of chip level partitioning, the number of terminals of a subcircuit is determined by the perimeter of the area used by the subcircuit.

Area of each partition: In case of system level partitioning, the area of each partition (board) is ..................[:=> Show Contents <=:]



research topics in computer science and engineering


Posted by: project topics
Created at: Saturday 22nd of January 2011 03:44:52 AM
Last Edited Or Replied at :Saturday 26th of February 2011 12:08:07 PM
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sessment Methodology for Evaluating Students' and Teachers' Performance in an Academic Institute
15. Impossible Differential Cryptanalysis of AES-128
16. ECC2K-130 on NVIDIA GPUs
17. Weighted Intra-Transactional Rule Mining for Database Intrusion Detection
18. New Boomerang Attacks on ARIA
19. A New Approach For Anonymous Publication in P2P File Sharing Applications
20. Random Euclidean Addition Chain Generation and Its Apllication to Point Multiplication
21. CyclicRainbow - A Multivariate Signature Scheme with a Partially Cyclic Public Key
22. FlexiRank: An Algorithm Offering Flexibil..................[:=> Show Contents <=:]



vlsi technology based seminars


Posted by: [email protected]
Created at: Monday 20th of September 2010 11:36:57 PM
Last Edited Or Replied at :Monday 28th of January 2013 11:08:16 PM
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hi i needed more vlsi technology based seminars with pdf and ppt....................[:=> Show Contents <=:]



Optical Interconnects


Posted by: project topics
Created at: Saturday 03rd of April 2010 09:10:33 AM
Last Edited Or Replied at :Saturday 09th of July 2011 05:03:43 AM
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TION



The idea of using optical techniques to address the chip-to-chip interconnection problems has been around for a long time. However, it is only in the last few years that technology with a realistic promise of eventual commercial applications has emerged. Progress can be attributed to a shift away from trying to develop custom VSLI techniques with in-built optoelectronic capability, towards developing techniques to allow parallel arrays of separately fabricated optoelectronic devices to be tightly integrated with standard foundry VLSI electronics, e.g. CMOS,Parallel optical interfac..................[:=> Show Contents <=:]



low power design in vlsi


Posted by: meghasb
Created at: Friday 06th of November 2009 05:22:01 AM
Last Edited Or Replied at :Tuesday 21st of September 2010 05:59:37 AM
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pls send me pdf of this topic an i..................[:=> Show Contents <=:]



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